Altera / Intel Arria? V 中端 FPGA

Altera Arria? V 中端 FPGA 包含最為全面的多款 中端 FPGA 產(chǎn)品，其中既有適用于每秒6千兆位 (Gbps)和10千兆位應用的最低功耗型號，又有帶寬最高且帶有 12.5Gbps 收發(fā)器的型號。Arria? V 器件特別適用于 功耗敏感型無(wú)線(xiàn)基礎設施設備、20G/40G 橋接、 交換、包處理應用、高清視頻處理 和圖像處理以及密集型數字信號處理 (DSP)等應用場(chǎng)合。

特性

· Two variants:

o Arria? V GT FPGAs offer low power mid-range FPGA for applications that require up to 20 transceivers at 10.3125Gbps and SFF 8431 compliance

o Arria? V GX FPGAs offer low power mid-range FPGA for applications that require up to 32 backplane-capable 6.5536Gbps transceivers

· Low static power

· Improved logic integration and differentiation capabilities

· Increased bandwidth capacity

· Hard-processor system (HPS) with integrated Arm? Cortex?-A9 MPCore processor

· Internal memory blocks

o M10K-10Kb memory blocks with soft error correction code (ECC)

o M20K-20Kb memory blocks with hard ECC (Arria V GZ devices only)

· Memory logic array block (MLAB)—640-bit distributed LUTRAM where you can use up to 50% of the ALMs as MLAB memory

· Embedded hard IP blocks

· Low system cost

· TSMC's 28nm process technology

· Thermal composite flip-chip BGA packaging

· High-performance FPGA fabric

· Clock networks

o Up to 650MHz global clock network

o Global, quadrant, and peripheral clock networks

o Clock networks that are not used can be powered down to reduce dynamic power

· Phase-locked loops (PLLs)

· FPGA general-purpose I/Os (GPIOs)

· External memory interface

· Memory interfaces with low latency (low-power high-speed serial interface)

應用

· Lowest total power for mid-range applications in:

o Remote radio units

o 10G / 40G line cards

o Broadcast studio equipment

資源

· Arria? V Device Handbook

· Arria? V Device Datasheet

· Arria? V Device Overview

· Arria? V PowerPlay Early Power Estimator User Guide

· Arria? V PowerPlay Early Power Estimator

產(chǎn)品說(shuō)明書(shū)